At present, the semiconductor industry in Chinese mainland (Mainland), especially IC design and packaging testing, is facing increasing competition due to a large number of participants, but the overall development level is still not high. Therefore, in these two fields, low-end products and services are seriously involved. If we want to break through this strange circle, we must develop in the high-end direction. At the same time, international manufacturers, whether IC design, wafer foundry or packaging test, have begun to intensify competition in high-end products and services, especially in the current global economic downturn, the demand for semiconductor products is weak, and the "involution" of international manufacturers in the field of high-tech is also intensifying. Packaging is a typical representative, because packaging test is the last link in semiconductor chip production, and its technical content is lower than wafer foundry. Therefore, international manufacturers are
Compared with traditional packaging technology, advanced packaging has the advantages of miniaturization, thinness, high density, low power consumption and functional integration, which can not only improve performance, expand functions and optimize form, but also reduce cost compared with system on a chip (SoC).
Traditional packaging technologies mainly include in-line packaging, surface mount, pin grid array (PGA), etc. Of course, there are sub-technologies below them, so I won’t go into details here. Advanced packaging technology can be divided into two stages: first, the technologies represented by ball grid array and Flip-Chip, FC) have developed to a relatively mature stage; Secondly, the technology represented by advanced system-in-package (SiP) and wafer-level package (WLP) is moving from the traditional two-dimensional to three-dimensional packaging. At present, this kind of technology is the most advanced and in the growth stage, and it is not fully mature. This paper mainly discusses these advanced packaging technologies that are not yet fully mature.
SiP is a very broad concept, broadly speaking, it covers almost all multi-chip packaging technologies, but as far as the most advanced SiP packaging technologies are concerned, it mainly includes 2.5D/3D Fan-out, Embedded, 2.5D/3D Integration and heterogeneous Chiplet packaging technologies.
Wafer-level packaging can be divided into Fan-in type and Fan-out type. Fan-in packaging is completed directly on the original silicon wafer, which is to arrange the required I/O within the original chip size, and the packaging size is basically equal to the chip size; Fan-out packaging is an improved version of Fan-in packaging, and the manufacturing process is basically the same as Fan-in packaging, except that it is not made on the original silicon wafer, but the chip is cut off and then the wafer is reassembled, so as to create the space of Fan-out area.
2.5D/3D Fan-out is developed from fan-out wafer-level packaging technology, with thousands of I/Os. It is the most advanced packaging technology at present and is widely used in mobile devices, especially smart phones.
According to Yole’s statistics, the market size of advanced packaging will be US$ 37.4 billion in 2021, and it is expected to grow to US$ 65 billion with a compound annual growth rate (CAGR) of 9.6% before 2027.
At present, in the generalized advanced packaging market, the scale of Flip-chip is the largest, accounting for 80% of the advanced packaging market share, followed by wafer-level fan-in and fan-out packaging. Compared with the overall advanced packaging market, wafer-level packaging is still relatively small, mainly controlled by a few manufacturers, but in terms of growth and development potential, 3D stacking/Embedded/wafer-level fan-out packaging is the fastest developing.
By 2027, it is estimated that the market size of 2D/3D packaging will reach 15 billion US dollars, the fan-out WLP will be about 4 billion US dollars, the fan-in type will be about 3 billion US dollars, and the Embedded type will be about 200 million US dollars. Compared with traditional packaging, the application scope of advanced packaging is expanding, and it is estimated that it will account for more than 50% of the whole packaging market by 2027.
In recent years, in addition to the traditional outsourcing testing Foundry (OSAT), foundry and IDM are also developing advanced packaging or related technologies, and even Fabless and OEM are involved.
Manufacturers of different formats have different resources invested in packaging business and different technological development routes. Generally speaking, the most representative enterprises include four companies, namely TSMC, Sunmoon, Intel and Samsung Electronics, among which TSMC and Samsung Electronics are Foundry, Intel is IDM and Sunmoon is OSAT.
Due to its foresight in developing advanced packaging technology and business, TSMC has become a leader in advanced packaging technology after years of accumulation and development, and has successively introduced chip on wafer (CowOS) packaging, Integrated Fan-Out, InFO) packaging, System on Integrated Chips, SoIC) and so on. Intel followed closely and introduced advanced packaging technologies such as EMIB, Foveros and Co-EMIB, trying to achieve the goal of doubling interconnection bandwidth and halving power consumption through 3 heterogeneous integration forms: 2.5D, 3D and embedded. Samsung Electronics is relatively backward. In order to catch up with TSMC, a few years ago, it introduced the technology of Fan-Out Panel Level Package, FOPLP LP), which further reduced the profile height of the package, enhanced the interconnection bandwidth and reduced the cost per unit area on a large-area Fan-out package, in order to achieve higher cost performance.
Foundry, because the 2.5D/3D packaging technology involves the continuation of the previous process, the wafer Foundry knows the previous process very well and has a deeper understanding of the overall wiring structure. Therefore, Foundry has more advantages than the traditional OSAT factory in terms of high-density packaging. In addition, Foundry is better at fan-out packaging, and has invested more in it. The main reason is that fan-out packaging has more I/O and a higher degree of customization. From the development situation, the traditional OSAT factory will be greatly impacted in fan-out packaging, and its market share will be smaller and smaller in the future. Yole predicts that by 2024, Foundry will occupy 71% of the fan-out packaging market, while OSAT’s market share will drop to 19%.
Take TSMC as an example. In 2020, the company integrated its SoIC, InFO, CoWoS and other 3DIC technologies and named it TSMC 3D Fabric, further integrating the process technology and packaging technology to enhance its competitiveness.
TSMC’s InFO packaging technology for mobile phone AP is InFO_PoP(Package-on-Package), which almost doesn’t use the loading board, and it competes with FC-PoP based on the loading board technology of OSAT.
The most advanced packaging technology is mostly used in mobile phone chips, such as application processor AP. In the package structure of mobile phone AP, the lower layer is logic IC, and the upper layer is DRAM. If using InFO_PoP technology, chip customers must purchase DRAM first. However, due to the similar price trend of DRAM and the high cost of wafer-level Fan-out, in recent years, although InFO_PoP has developed to the seventh generation, Apple AP is the main one that actually has mass production orders.
Considering the purchasing cost of DRAM, TSMC has introduced the InFO_B(Bottom only) derivative technology with only the lower logic IC package. It is understood that MediaTek and others are interested in this technology. After all, the development trend of mobile phone AP has not changed, and perhaps Fan-out technology is the key to compete with Qualcomm and catch up with Apple.
First-line IC design companies have pointed out that although mobile phone chip manufacturers are willing to introduce advanced packaging technologies such as Fan-out, the production line will first lock in a few top flagship APS, and at the same time give priority to Foundry, which has the most mass production experience. OSAT factories such as Sunmoon, Amkor, and Changdian, the strength is the carrier-based FC packaging technology with huge demand. Even in 4nm and 3nm processes, FC packaging is still the first choice with cost-effective advantages. However, IC design companies need more differentiated products and services. After IC design companies have obtained advanced process capacity, they will enter the back-end packaging process. The only one with mass production experience of mobile phone AP Fan-out packaging in the market is TSMC.
As for Samsung, the advanced packaging technology started relatively late compared with TSMC. Samsung originally wanted to grab the market share of mobile phone AP by using the fan-out panel-level packaging (FOPLP) technology. However, Samsung has not been able to solve the problems of warpage of FOPLP, and at the same time, the chip precision of FOPLP packaging can not be compared with wafer-level packaging, which makes the yield and cost problems unable to be improved. At present, the chips mass-produced by FOPLP are still mainly smart wearable devices, and it is impossible to achieve mass production in more demanding applications such as smart phones.
Faced with the unsuccessful FOPLP, Samsung introduced the 3D stacking technology "X-Cube" in 2020, and in 2021 announced that it was developing the "3.5D package" technology.
In order to catch up with competitors in advanced packaging technology, in June, 2022, Samsung DS Division established the Semiconductor Packaging Working Group (TF), which is directly under the CEO of DS Business Division.
As an IDM, Intel is also actively deploying 2.5D/3D packaging, and the mass production time of its packaged products is later than TSMC. The representative technology of Intel 2.5D package is EMIB, which can be used to benchmark TSMC’s CoWoS technology, and 3D packaging technology Foveros can benchmark TSMC’s InFO. However, at present and in the foreseeable future, Intel’s packaging technology is mainly used in its own products, which has little impact on the market.
Compared with Foundry and IDM, traditional OSAT has an advantage in multi-functional substrate integration components (such as SiP packaging), and its market share is also larger. In addition, OSAT is good at fan-in packaging and will remain the main player in the market.
Compared with Foundry’s SiP packaging technology, the advantage of OSAT factory (Sunmoon, etc.) lies in heterogeneous integration. For example, Apple Watch S series integrates various active and passive devices with high density, and related technologies are mostly used for the integration of various devices in the fields of radio frequency, base station and automotive electronics. Foundry, on the other hand, is not willing to lay out the layout in this field, and mainly focuses on the difficult and high-density packaging technology required for high-performance computing and high-end sensing. Therefore, heterogeneous SiP encapsulation is a stable incremental market for OSAT. According to Yole statistics, in 2020, OSAT will occupy 60% of the SiP market share, while Foundry and IDM will occupy 14% and 25% respectively.
For international manufacturers, the traditional packaging technology has been submerged in the "Red Sea" and there is no investment value. With the development of advanced process technology and Moore’s Law becoming more and more mismatched, we need to work hard on advanced packaging technology, which is the demand put forward by the development of market application. Therefore, international manufacturers, especially those who are in the leading position in advanced process technology, both Foundry and IDM, have begun to invest heavily in the most advanced packaging field in order to form a moat in the integration of advanced process and advanced packaging, so as to occupy a more favorable position in the future competition.
On the road of developing the most advanced packaging technology, different manufacturers choose different routes.
Traditional OSAT does not have the previous process of chip manufacturing, and its packaging technology does not require high integration and matching with the manufacturing process. Therefore, the main development direction of OSAT is still multi-chip SiP packaging.
Foundry, on the other hand, is just the opposite of OSAT. It needs to give full play to the advantages of its advanced chip manufacturing process and take the route of highly integrated chip manufacturing and packaging.
IDM is between Foundry and OSAT, which is more balanced. Whether it is wafer-level packaging or advanced SiP, IDM has a broader application. As far as the current situation is concerned, Intel is the only IDM that can control and is willing to re-inject the advanced packaging technology that matches the advanced process technology (below 10nm). As the share of foreign sales is very limited, compared with Foundry and OSAT, the most advanced packaging technology developed by Intel focuses on "self-entertainment". Whether it can be expanded in the future depends on the development of the company’s wafer foundry business.